Georgia Institute of Technology School of Electrical and Computer Engineering Cadence University Program Member Cadence Tools in theCadence software is being used primarily in the following courses in the at:. and use version 16.6 of SPB/Orcadlite/PSpice for basic instruction in SPICE. ECE 3060 (VLSI and Advanced Digital Design): The Virtuoso schematic/layout editors along with Diva DRC/LVS tools are used by the students to design a 16bit Microprocessor. The students uses the Cadence tools to design the schematic and the layout of individual units such as Adder, Register File, Decoders, etc.
And perform DRC/LVS checks on them. The Cadence tools in this course introduces students to the basic VLSI design skills.
ECE 6130/4130 (Advanced VLSI Systems): The Virtuoso schematic/layout editors and Diva/Calibre DRC/LVS/Extraction tools are used in this course to teach students advances concepts of digital system design using the NCSU Design Kit. The course uses Cadence Virtuoso as the only acceptable tool for a semester long design project in this course. For example, in last two years in the design project students are designing a three stage pipelined system – an SRAM array, a one-cycle Interconnect, and a fast adder – using Cadence tools in this course. The design is performed at advanced technology nodes (e.g.
IBM130nm, FreePDK45nm etc.) with aggressive voltage/frequency targets (1GHZ at 0.8-1V supply). A significant number of students in this class also uses Spectre simulation environment for design while a fraction of students uses HSPICE for simulations. (Physical Design Automation VLSI Systems): Encounter and Virtuoso for digital IC designs. (Analog Integrated System Design): Custom IC and Verification are utilized for projects involving deep brain stimulation, wireless cardiac monitoring and electrocardiogram monitoring. Cadence is used for design projects in the graduate course “Wireless IC Design”. Standard device models are used in conjunction with Spectre and SpectreRF simulation in Cadence to design circuits for Ultra Wide-Band (UWB) applications.
Baseband and time-domain simulations of analog front-ends and back-end circuits are performed. ECE6430 (MOS Digital ICs): The MOS Digital IC course uses Virtuoso schematic/layout editor along with Spectre to teach students advanced concepts of digital circuit design. In this course, Cadence tools are normally used to solve small scale design problems in Homework. ECE8893 (Digital System in Nanometer Nodes): In this course, each student defines his/her own design project ranging from digital system integration to low-level circuit techniques. All the projects (12-15)are implemented using Cadence design tools including Virtuoso, Diva or Calibre DRC/LVS/Extraction and SoC encounter (for Auto Place/Route). The designed projects may lead to Fabrication of test chips.
Cadence tools are used by the. The goal of the team is to design digital hardware which is highly resistant to reverse engineering and attack by malicious hardware insertions (hardware Trojans).Cadence Tools in ProjectsCadence software is being used in many research projects in the School of Electrical and Computer Engineering. They include the following, wide-ranging initiatives. The is designing and building prototypes, which demonstrate next generation packaging technology developed at the center. Integrated systems for segmented locomotion are being built in the with funding from. The Cooperative Analog and Digital Signal Processing (CADSP) laboratory has used the Cadence tools for an intelligent audio processing project funded by National Semiconductor.
Their goal is to create a low-power analog front-end that triggers a more complicated Digital Signal Processing system. They used Cadence to simulate the individual components (filters, zero-crossings detector, and classification circuit) and the complete system.
Cadence Ic Design Virtuoso
Cadence Ic Design
This work required them to use audio files as stimuli to analog circuits in Cadence. As a result, they created a MATLAB function, that converts a sound file into a SPICE piece-wise-linear-source (PWLS) that can be included in a Cadence spectreS simulation, (simply by including the file under the “Environments” tab and rebuilding the netlist).